This invention relates to semiconductor devices and, more particularly, to an LDMOS (lateral double-diffused xe2x80x9cmetalxe2x80x9d-oxide-semiconductor) device having a self-aligned RESURF (REduced SURface Field) region and method of fabrication thereof.
LDMOS (lateral double-diffused MOS) devices are quickly replacing bipolar devices as power devices in intelligent power integrated circuits due to their performance advantage. The proliferation of increasingly diversified applications for power integrated circuits has led to a desire for components having a wide variety of breakdown voltages (BVdss).
RESURF (REduced SURface Field) LDMOS transistors have been developed in which a RESURF diffusion is placed in the drift region of the device to maximize breakdown voltage (BVdss) for a given specific-on-resistance (Rsp=Rdson*Area, where Rdson=drain to source resistance with the transistor on). While presently available RESURF LDMOS devices exhibit high breakdown voltages and low specific-on-resistance, considerable variation in breakdown voltage is exhibited among devices fabricated by the same process on different wafers or in different lots. This wide variation in breakdown voltage is unacceptable in the many applications that can tolerate only a narrow range of breakdown voltages. This causes low yields and high costs.
Accordingly, a need exists for a RESURF LDMOS device having a stable, predictable breakdown voltage.
Applicants have discovered that variations in 1.) alignment tolerance for the RESURF region overlap of the LOCOS region (where overlap=lateral spacing between the edge of LOCOS field oxide region adjacent to the thin gate oxide and the edge of RESURF region), and 2.) alignment tolerance between the RESURF region and DWELL region, contribute to the unacceptable variation in breakdown voltages in presently available RESURF LDMOS transistors. In addition, applicants have discovered that variations in RESURF implant dose tolerance causes premature breakdown problem on the drain N+ contact side of the device.
Generally, and in one form of the invention, a transistor includes:
a semiconductor layer of a first conductivity type;
a RESURF region of a second conductivity type formed in the semiconductor layer;
a LOCOS field oxide region formed at a face of the RESURF region, the RESURF region being self-aligned to the LOCOS field oxide region;
a well of the first conductivity type formed in the semiconductor layer;
a source region of the second conductivity type formed in the well, a channel region defined in the well between a first edge of the source region and a first edge of the RESURF region;
a drain region of the second conductivity type formed in the semiconductor layer adjacent a second edge of the RESURF region; and
a conductive gate formed over and insulated from the channel region.
In another aspect of the invention, a method of manufacturing a transistor includes the steps of:
forming a semiconductor layer of a first conductivity type;
forming a mask over the semiconductor layer, the mask having an opening exposing a first region of the semiconductor layer;
implanting a dopant of a second conductivity type through the opening in the mask in the first region of the semiconductor layer to form a RESURF region;
growing a LOCOS field oxide region at a face of the first region defined by the opening of the mask, the RESURF region being self-aligned with the LOCOS field oxide region;
forming a conductive gate over and insulated from a face of the semiconductor layer, the conductive gate extending over a portion of the LOCOS field oxide region;
forming a well of the first conductivity type in the semiconductor layer adjacent the RESURF region;
forming a source region of the second conductivity type in the well, the conductive gate extending over a channel region defined in the well between a first edge of the source region and a first edge of the RESURF region; and
forming a drain region of the second conductivity type in the semiconductor layer adjacent a second edge of the RESURF region.
It is an advantage of the invention that the RESURF region is self-aligned to the LOCOS field oxide region. This feature produces a stable breakdown voltage, BVdss, thus enhancing device performance, by eliminating degradation associated with geometric misalignment and process tolerance variation. Further, the RESURF LDMOS transistor of the present invention is fabricated using standard P well and standard source/drain diffusions formed in a P epitaxial layer on a P substrate and is therefore compatible with conventional linear BiCMOS processes and may be formed on an integrated circuit having a wide variety of other linear BiCMOS process compatible devices.